Digilent 410-346-10 – Arty Z7-10 System-on-Chip

• 650MHz dual-core Cortex-A9 processor
• DDR3 memory controller with 8 DMA channels and 4 High Performance AXI3 Slave ports
• High-bandwidth peripheral controllers: 1G Ethernet, USB 2.0, SDIO

The Arty Z7 is a ready-to-use development platform designed around the Zynq-7000™ All Programmable System-on-Chip (AP SoC) from Xilinx. The Zynq-7000 architecture tightly integrates a dual-core, 650 MHz ARM Cortex-A9 processor with Xilinx 7-series Field Programmable Gate Array (FPGA) logic. This pairing grants the ability to surround a powerful processor with a unique set of software-defined peripherals and controllers, tailored by you for the target application.

The Vivado, Petalinux, and SDSoC toolsets each provide an approachable path between defining your custom peripheral set and bringing its functionality up to a Linux OS or bare metal program running on the processor. For those looking for a more traditional digital logic design experience, it is also possible to ignore the ARM processors and program the Zynq’s FPGA like you would any other Xilinx FPGA. Digilent provides a number of materials and resources for the Arty Z7 that will get you up and running with your tool of choice quickly.

Memory

• 512MB DDR3 with 16-bit bus @ 1050Mbps
• 16MB Quad-SPI Flash with factory-programmed 48-bit globally unique EUI-48/64™ compatible identifier
• microSD slot

Power

• Powered from USB or any 7V-15V external power source

USB and Ethernet

• Gigabit Ethernet PHY
• USB-JTAG Programming circuitry
• USB-UART bridge
• USB OTG PHY (supports host only)

Audio and Video

• HDMI sink port (input)
• HDMI source port (output)
• PWM driven mono audio output with 3.5mm jack

Switches, Push-buttons, and LEDs

• 4 push-buttons
• 2 slide switches
• 4 LEDs
• 2 RGB LEDs

Expansion Connectors

• Two standard Pmod ports
  – 16 Total FPGA I/O
• Arduino/chipKIT Shield connector
  – Up to 49 Total FPGA I/O (see table above)
  – 6 Single-ended 0-3.3V Analog inputs to XADC
  – 4 Differential 0-1.0V Analog inputs to XADC