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Digilent PYNQ-Z1 – Python Productivity for Zynq

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Python Productivity for Zynq

  • 650MHz dual-core Cortex-A9 processor
  • DDR3 memory controller with 8 DMA channels and 4 high performance AXI3 slave ports
  • High-bandwidth peripheral controllers: 1G Ethernet, USB 2.0, SDIO
  • Low-bandwidth peripheral controller: SPI, UART, CAN, I2C
  • Programmable from JTAG, Quad-SPI flash, and microSD card
  • Artix-7 family programmable logic
  • 13,300 logic slices, each with four 6-input LUTs and 8 flip-flops
  • 630 KB of fast block RAM
  • 4 clock management tiles, each with a phase-locked loop (PLL) and mixed-mode clock manager (MMCM)
  • 220 DSP slices
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Description

Digilent PYNQ-Z1

  • 650MHz dual-core Cortex-A9 processor
  • DDR3 memory controller with 8 DMA channels and 4 high performance AXI3 slave ports
  • High-bandwidth peripheral controllers: 1G Ethernet, USB 2.0, SDIO
  • Low-bandwidth peripheral controller: SPI, UART, CAN, I2C
  • Programmable from JTAG, Quad-SPI flash, and microSD card

Python Productivity for Zynq

The PYNQ-Z1 board is designed to be used with PYNQ, a new open-source framework that enables embedded programmers to exploit the capabilities of Xilinx Zynq All Programmable SoCs (APSoCs) without having to design programmable logic circuits. Instead the APSoC is programmed using Python, with the code developed and tested directly on the PYNQ-Z1. The programmable logic circuits are imported as hardware libraries and programmed through their APIs in essentially the same way that the software libraries are imported and programmed.

The PYNQ-Z1 board is the hardware platform for the PYNQ open-source framework. The software running on the ARM A9 CPUs includes:

  • A web server hosting the Jupyter Notebook design environment
  • The IPython kernel and packages
  • Linux
  • Base hardware library and API for the FPGA

For designers who want to extend the base system by contributing new hardware libraries, Xilinx Vivado WebPACK tools are available free of cost.

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